1. Field of Invention
The present invention is related to any application using a DC/DC converter, especially when a dual polarity boost regulator is needed in a hard disk DSA. Costs related to silicon area and precision are the main concerns in integrated circuit design industry. Accordingly, there is a continuing need to supply a high performance yet cost effective dual polarity high voltage supplies to the DSA driver.
2. Description of Related Art
There are various ways to supply dual polarity voltage to the DSA driver from the low voltage supplies. A simplified schematic of a generic prior art DSA driver 10 is shown for context in FIG. 1. An input voltage supplied from a DAC transitions from typical voltages of 0.6 volts to 2.6 volts and is supplied to the positive input of amplifier 12. A resistor feedback network is coupled between the output and the negative input of amplifier 12. Amplifier 12 is supplied by high voltage power supplies. The positive power supply is +20 volts and the negative power supply is −20 volts. The output of amplifier 12 then swings from −20 volts to +20 volts, which is sufficient for powering the DSA Piezo actuator, as shown in FIG. 1.
A first prior art method and circuit 20 shown in FIG. 2 uses a negative charge pump configuration plus a conventional boost regulator to provide the +VE and −VE power supply voltages. Control circuit 22 drives transistor M1. Diode D1 is coupled across the current path of transistor M1. The drain of transistor M1 is coupled to node 26, which is in turn coupled to a +12 volt supply voltage through inductor L1. The positive power supply +VE is provided by diode D4, which is coupled to node 26 at one end, and by capacitor C3, which is coupled to the other end of D4. The negative power supply −VE is provided capacitors C1 and C2, and diodes D2 and D3. Capacitor C1 is coupled to node 26 and to the junction of diodes D2 and D3. Capacitor C2 is coupled to diode D2 at the −VE supply voltage node.
A second prior art method shown in FIG. 3 and FIG. 4 uses separate positive and negative regulators 30 and 40 to provide the −VE and +VE power supply voltages. The positive voltage is generated by an inductive boost regulator and the negative voltage is generated by a negative capacitor charge pump. Accordingly, FIG. 4 shows a control circuit 42 for driving transistor M4 and diode D41, which are coupled to node 44. Inductor L41 is coupled between node 44 and the +12 volt supply voltage. Diode D42 is coupled between node 44 and node 46, which is the +VE supply voltage terminal. In turn, FIG. 3 shows a control circuit 32 for driving transistor M31 and diode D31, and transistor M32 and diode D32. The transistors are coupled between the V40 power supply and ground. Capacitor 31 is coupled between node 36, and diodes D33 and D34. Diode D34, in turn, is coupled to capacitor C32 at node 34, which is the −VE power supply voltage.
A third prior art method and circuit 50 shown in FIG. 5 uses a single inductor, dual polarity architecture that is used in a number of commercial devices. The regulator senses the output voltages via an operational transconductance amplifier (“OTA”) and its feedback to a MUX for comparison with a low external low FET current limit. The high side turns on with a fixed pulse. A control circuit 59 is used to drive transistor M51 and diode D51, which are coupled to node 56. Transistor M52 and diode D52 are driven at node 54 and are powered by a +12 volt supply voltage. Inductor 51 is coupled between transistor M51 and transistor M52. Diode D53 is coupled to capacitor C51 at node 58 for providing the +VE power supply voltage. Diode D54 is coupled to capacitor C52 at node 52 for providing the −VE power supply voltage.
The circuit 60 shown in FIG. 6 is a more detailed version of the circuit shown in FIG. 5. Circuit 60 includes two OTAs 61 and 62 coupled to capacitors 64 and 65 and to MUX 66. The output of MUX 66 is coupled to comparator 68. The output of comparator 68 and a switching signal 67 are provided to control circuit 69 for driving transistor M61 and diode D61, and transistor M62 and diode D62. Inductor L61 is coupled between nodes 601 and 602. Diode D64 is coupled between node 602 and the HVP node for providing the +VE power supply voltage. Diode D63 is coupled between node 601 and the HVM node for providing the −VE power supply voltage. Feedback is provided from the HVM node to amplifier 62 and resistors R61 and R62. Feedback is provided from the HVP node to resistors R63 and R64. Feedback is provided from R65 to the negative input of comparator 68.
In a conventional disk drive, the Voice Coil Motor (“VCM”) performs all positioning of the head to read data located on the disk. However, with current disk space demand, the track density on the disk media has grown tremendously. Since this a mechanical design, the assembly of the voice coil actuator tends to have low natural frequencies and these accumulate vibrations and cause Off-Track Errors. Therefore, one actuator is not enough to increase the data storage capacity. With the use of a secondary actuator at the tip of the main actuator, this complements the traditional VCM actuator and forms a dual stage servo system. With many current designs, this secondary actuator can be designed to have a higher natural frequency and also less vibration. With these mechanical designs, the whole system will need to be complemented with an electrical device or drivers to drive the secondary actuator. There is, therefore, a need to generate the bias voltage for the DSA driver of about ±20 volts from low voltage PC supplies of +5 volts and +12 volts.